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1. general description the 74lvc2g04 provides the dual inverting buffer. inputs can be driven from either 3.3 v or 5 v devices. these features allow the use of these devices in a mixed 3.3 v and 5 v environment. this device is fully speci?ed for partial power-down applications using i off . the i off circuitry disables the output, preventing the damaging back?ow current through the device when it is powered down. 2. features n wide supply voltage range from 1.65 v to 5.5 v n 5 v tolerant inputs for interfacing with 5 v logic n high noise immunity n complies with jedec standard: u jesd8-7 (1.65 v to 1.95 v) u jesd8-5 (2.3 v to 2.7 v) u jesd8b/jesd36 (2.7 v to 3.6 v) n esd protection: u hbm jesd22-a114e exceeds 2000 v u mm jesd22-a115-a exceeds 200 v n 24 ma output drive (v cc = 3.0 v) n cmos low power consumption n latch-up performance exceeds 250 ma n direct interface with ttl levels n inputs accept voltages up to 5 v n multiple package options n speci?ed from - 40 cto+85 c and - 40 c to +125 c. 74lvc2g04 dual inverter rev. 04 25 july 2007 product data sheet
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 2 of 14 nxp semiconductors 74lvc2g04 dual inverter 3. ordering information 4. marking 5. functional diagram table 1. ordering information type number package temperature range name description version 74lvc2g04gw - 40 c to +125 c sc-88 plastic surface-mounted package; 6 leads sot363 74lvc2g04gv - 40 c to +125 c tsop6 plastic surface-mounted package (tsop6); 6 leads sot457 74lvc2g04gm - 40 c to +125 c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1.45 0.5 mm sot886 74lvc2g04gf - 40 c to +125 c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1 0.5 mm sot891 table 2. marking type number marking code 74lvc2g04gw v4 74lvc2g04gv v04 74lvc2g04gm v4 74lvc2g04gf v4 fig 1. logic symbol fig 2. iec logic symbol fig 3. logic diagram (one gate) mnb079 1a 1y 1 6 2a 2y 3 4 1 1 6 mnb080 3 1 4 mna110 a y
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 3 of 14 nxp semiconductors 74lvc2g04 dual inverter 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level. fig 4. pin con?guration sot363 and sot457 fig 5. pin con?guration sot886 fig 6. pin con?guration sot891 74lvc2g04 1a 1y gnd 2a 2y 001aab649 1 2 3 6 v cc 5 4 74lvc2g04 gnd 001aab650 1a 2a v cc 1y 2y transparent top view 2 3 1 5 4 6 74lvc2g04 gnd 001aaf872 1a 2a v cc 1y 2y transparent top view 2 3 1 5 4 6 table 3. pin description symbol pin description 1a 1 data input gnd 2 ground (0 v) 2a 3 data input 2y 4 data output v cc 5 supply voltage 1y 6 data input table 4. function table [1] input output na ny lh hl
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 4 of 14 nxp semiconductors 74lvc2g04 dual inverter 8. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] when v cc = 0 v (power-down mode), the output voltage can be 5.5 v in normal operation. [3] for sc-88 and sc-74 packages: above 87.5 c the value of p tot derates linearly with 4.0 mw/k. for xson6 packages: above 45 c the value of p tot derates linearly with 2.4 mw/k. 9. recommended operating conditions table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +6.5 v i ik input clamping current v i < 0 v - 50 - ma v i input voltage [1] - 0.5 +6.5 v i ok output clamping current v o > v cc or v o < 0 v - 50 ma v o output voltage active mode [1] [2] - 0.5 v cc + 0.5 v power-down mode [1] [2] - 0.5 +6.5 v i o output current v o = 0 v to v cc - 50 ma i cc supply current - 100 ma i gnd ground current - 100 - ma p tot total power dissipation t amb = - 40 c to +125 c [3] - 250 mw t stg storage temperature - 65 +150 c table 6. recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage 1.65 - 5.5 v v i input voltage 0 - 5.5 v v o output voltage active mode 0 - v cc v power-down mode; v cc = 0 v 0 - 5.5 v t amb ambient temperature - 40 - +125 c d t/ d v input transition rise and fall rate v cc = 1.65 v to 2.7 v - - 20 ns/v v cc = 2.7 v to 5.5 v - - 10 ns/v
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 5 of 14 nxp semiconductors 74lvc2g04 dual inverter 10. static characteristics [1] all typical values are measured at v cc = 3.3 v and t amb =25 c. table 7. static characteristics at recommended operating conditions. voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max v ih high-level input voltage v cc = 1.65 v to 1.95 v 0.65v cc - - 0.65v cc -v v cc = 2.3 v to 2.7 v 1.7 - - 1.7 - v v cc = 2.7 v to 3.6 v 2.0 - - 2.0 - v v cc = 4.5 v to 5.5 v 0.7v cc - - 0.7v cc -v v il low-level input voltage v cc = 1.65 v to 1.95 v - - 0.35v cc - 0.35v cc v v cc = 2.3 v to 2.7 v - - 0.7 - 0.7 v v cc = 2.7 v to 3.6 v - - 0.8 - 0.8 v v cc = 4.5 v to 5.5 v - - 0.3v cc - 0.3v cc v v oh high-level output voltage v i =v ih or v il i o = - 100 m a; v cc = 1.65 v to 5.5 v v cc - 0.1 - - v cc - 0.1 - v i o = - 4 ma; v cc = 1.65 v 1.2 - - 0.95 - v i o = - 8 ma; v cc = 2.3 v 1.9 - - 1.7 - v i o = - 12 ma; v cc = 2.7 v 2.2 - - 1.9 - v i o = - 24 ma; v cc = 3.0 v 2.3 - - 2.0 - v i o = - 32 ma; v cc = 4.5 v 3.8 - - 3.4 - v v ol low-level output voltage v i =v ih or v il i o = 100 m a; v cc = 1.65 v to 5.5 v - - 0.10 - 0.10 v i o = 4 ma; v cc = 1.65 v - - 0.45 - 0.70 v i o = 8 ma; v cc = 2.3 v - - 0.30 - 0.45 v i o = 12 ma; v cc = 2.7 v - - 0.40 - 0.60 v i o = 24 ma; v cc = 3.0 v - - 0.55 - 0.80 v i o = 32 ma; v cc = 4.5 v - - 0.55 - 0.80 v i i input leakage current v i = 5.5 v or gnd; v cc = 0 v to 5.5 v - 0.1 5- 20 m a i off power-off leakage current v cc = 0 v; v i or v o = 5.5 v - 0.1 10 - 20 m a i cc supply current v i = 5.5 v or gnd; i o = 0 a; v cc = 1.65 v to 5.5 v - 0.1 10 - 40 m a d i cc additional supply current per pin; v cc = 2.3 v to 5.5 v; v i =v cc - 0.6 v; i o =0 a - 5 500 - 5000 m a c i input capacitance v cc = 3.3 v; v i = gnd to v cc - 2.5 - - - pf
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 6 of 14 nxp semiconductors 74lvc2g04 dual inverter 11. dynamic characteristics [1] typical values are measured at t amb =25 c and v cc = 1.8 v, 2.5 v, 2.7 v, 3.3 v and 5.0 v respectively. [2] t pd is the same as t plh and t phl . [3] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l v cc 2 f o ) = sum of outputs. 12. ac waveforms table 8. dynamic characteristics voltages are referenced to gnd (groun d = 0 v); for load circuit see figure 8 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max t pd propagation delay na to ny; see figure 7 [2] v cc = 1.65 v to 1.95 v 1.0 3.5 8.0 1.0 9.5 ns v cc = 2.3 v to 2.7 v 1.0 2.2 4.4 1.0 5.4 ns v cc = 2.7 v 1.0 2.7 5.2 1.0 7.0 ns v cc = 3.0 v to 3.6 v 0.5 2.7 4.1 0.5 5.5 ns v cc = 4.5 v to 5.5 v 1.0 1.9 3.2 1.0 3.8 ns c pd power dissipation capacitance v i = gnd to v cc ; v cc = 3.3 v [3] - 13.5 - - - pf measurement points are given in t ab le 9 . v ol and v oh are typical output voltage levels that occur with the output load. fig 7. the input na to output ny propagation delays mna344 t phl t plh v m v m v m v m na input ny output gnd v i v oh v ol
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 7 of 14 nxp semiconductors 74lvc2g04 dual inverter table 9. measurement points supply voltage input output v cc v m v m 1.65 v to 1.95 v 0.5v cc 0.5v cc 2.3 v to 2.7 v 0.5v cc 0.5v cc 2.7 v 1.5 v 1.5 v 3.0 v to 3.6 v 1.5 v 1.5 v 4.5 v to 5.5 v 0.5v cc 0.5v cc test data is given in t ab le 10 . de?nitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 8. load circuit for switching times v ext v cc v i v o mna616 dut c l r t r l r l g table 10. test data supply voltage input load v ext v cc v i t r =t f c l r l t plh , t phl 1.65 v to 1.95 v v cc 2.0 ns 30 pf 1 k w open 2.3 v to 2.7 v v cc 2.0 ns 30 pf 500 w open 2.7 v 2.7 v 2.5 ns 50 pf 500 w open 3.0 v to 3.6 v 2.7 v 2.5 ns 50 pf 500 w open 4.5 v to 5.5 v v cc 2.5 ns 50 pf 500 w open
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 8 of 14 nxp semiconductors 74lvc2g04 dual inverter 13. package outline fig 9. package outline sot363 (sc-88) references outline version european projection issue date iec jedec jeita sot363 sc-88 wb m b p d e 1 e pin 1 index a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 4 5 6 plastic surface-mounted package; 6 leads sot363 unit a 1 max b p cd e e 1 h e l p qy w v mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.45 0.15 0.25 0.15 a 1.1 0.8 04-11-08 06-03-16
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 9 of 14 nxp semiconductors 74lvc2g04 dual inverter fig 10. package outline sot457 (sc-74) references outline version european projection issue date iec jedec jeita sot457 sc-74 wb m b p d e pin 1 index a a 1 l p q detail x h e e v m a a b y scale c x 13 2 4 5 6 0 1 2 mm plastic surface-mounted package (tsop6); 6 leads sot457 unit a 1 b p cd e h e l p qy w v mm 0.1 0.013 0.40 0.25 3.1 2.7 0.26 0.10 1.7 1.3 e 0.95 3.0 2.5 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.6 0.2 0.33 0.23 a 1.1 0.9 05-11-07 06-03-16
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 10 of 14 nxp semiconductors 74lvc2g04 dual inverter fig 11. package outline sot886 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot886 mo-252 sot886 04-07-15 04-07-22 dimensions (mm are the original dimensions) xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 1.5 1.4 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.5 0.6 a (1) max 0.5 0.04 1 6 2 5 3 4 6 (2) 4 (2) a
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 11 of 14 nxp semiconductors 74lvc2g04 dual inverter fig 12. package outline sot891 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot891 sot891 05-04-06 07-05-15 xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale dimensions (mm are the original dimensions) unit mm 0.20 0.12 1.05 0.95 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.35 0.55 a max 0.5 0.04 1 6 2 5 3 4 a 6 (1) 4 (1) note 1. can be visible in some manufacturing processes.
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 12 of 14 nxp semiconductors 74lvc2g04 dual inverter 14. abbreviations 15. revision history table 11. abbreviations acronym description cmos complementary metal oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model ttl transistor-transistor logic table 12. revision history document id release date data sheet status change notice supersedes 74lvc2g04_4 20070725 product data sheet - 74lvc2g04_3 modi?cations: ? new package outline drawing for xson6/sot891. 74lvc2g04_3 20070216 product data sheet - 74lvc2g04_2 74lvc2g04_2 20040915 product speci?cation - 74lvc2g04_1 74lvc2g04_1 20030722 product speci?cation - -
74lvc2g04_4 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 04 25 july 2007 13 of 14 nxp semiconductors 74lvc2g04 dual inverter 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 16.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 16.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 16.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 17. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74lvc2g04 dual inverter ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 25 july 2007 document identifier: 74lvc2g04_4 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 recommended operating conditions. . . . . . . . 4 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 13 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 16.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 16.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 17 contact information. . . . . . . . . . . . . . . . . . . . . 13 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

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